Plenary Speaker

MNC 2024 Plenary Speakers List

Dr. Yoshihisa Kagawa, Sony Semiconductor Solutions Corporation, Japan PAPER TITLE Novel 3D Stacking Process Technologies to Evolve CMOS Image Sensors

SHORT BIOGRAPHY Yoshihisa Kagawa is a general manager of Research Division at Sony Semiconductor Solutions Corporation. He joined Sony Corporation in 2004 and he has been a specialist for BEOL and 3D-stacking process integration. Especially, he contributed to launch Sony’s Cu-Cu hybrid bonding process and announced its rollout at IEDM 2016. Currently, he manages the research and development of process integration for stacked CMOS image sensors. He is a committee member of IEEE Electronic Components and Technology Conference (ECTC) and IEEE International Interconnect Technology Conference (IITC). SHORT ABSTRACT In the field of CMOS Image Sensors (CIS), there has been high demand for new functions that can respond various photo taking scenes. We have developed the stacked Back Illuminated-CIS (BI-CIS), composed of conventional BI-CIS technology and standard logic technology. To realize the fine-pitch and large-scale electrical connection between upper CIS chip and lower logic chip, we have developed the wafer-to-wafer Cu-Cu hybrid bonding technology and successfully introduced it to our stacked BI-CIS in 2015. Since then, to fabricate more advanced stacked BI-CISs we have developed various kinds of novel process technologies: 3-wafers stacking process, chip-to-wafer stacking process and ultra-fine pitch Cu-Cu hybrid bonding. In this talk, the process technologies that have evolved the stacked BI-CIS will be discussed.